ITE Technical Group Submission System
Conference Schedule |
Online Proceedings
[Sign in]
|
|
|
|
|
All Technical Committee Conferences (Searched in: All Years)
|
|
|
| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
|
|
| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| IST |
2023-09-15
14:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online) |
High Full Well Capacity and Low Noise Characteristics in 0.6 μm Pixels via Buried Sublocal Connections in a 2-Layer Transistor Pixel Stacked CMOS Imager Sensor
Keiji Nishida, Masataka Sugimoto, Tatsuya Okawa, Kanta Suzuki, Tomoharu Ogita, Katsunori Hiramatsu, Tomoyuki Hirano, Yoshiaki Kikuchi (SSS), Yuji Nishimura, Kohei Takeuchi, Daisuke Yoneyama, Toru Nagaki, Noriteru Yamada, Hiroyuki Kawashima (SCK), Yoshiaki Kitano (SSS) |
[more] |
IST2023-42
pp.29-32 |
| IST |
2018-03-09
12:00 |
Tokyo |
NHK Housou-Gijyutu Lab. |
[Invited Talk]
Pixel/DRAM/logic 3-layer stacked CMOS image sensor technology
Hidenobu Tsugawa, Hiroshi Takahashi, Ryoichi Nakamura, Taku Umebayashi, Tomoharu Ogita, Hitoshi Okano, Kazuya Iwase, Hiroyuki Kawashima, Takatsugu Yamasaki, Daisuke Yoneyama, Jun Hashizume, Tsutomu Nakajima, Kenichi Murata, Yoshikazu Kanaishi, Kenji Ikeda, Keiji Tatani, Hajime Nakayama, Tsutomu Haruta, Tetsuo Nomoto (Sony) |
[more] |
IST2018-17
pp.25-29 |
| IST |
2014-03-14
11:30 |
Tokyo |
NHK |
3D Stacked CMOS Image Sensor
Taku Umebayashi, Tomoharu Ogita, Shunichi Sukegawa, Tsutomu Nakajima, Hiroshi Kawanobe (Sony), Ken Koseki (Sony LSI Design), Tsutomu Haruta, Hiroshi Takahashi (Sony), Keishi Inoue (Sony Semiconductor), Toshifumi Wakano, Yusuke Mada, Koji Fukumoto, Takashi Nagano, Yoshikazu Nitta, Teruo Hirayama (Sony) |
We have developed 3D stacked CMOS image sensor. This technology is a Back-illuminated CIS stacking on a logic substrate.... [more] |
IST2014-9
p.5 |
|
|
|
|
|
[Return to Top Page]
[Return to ITE Web Page]
|