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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IEICE-SDM, IEICE-ICD, IST [detail] |
2021-08-18 09:30 |
Online |
Online |
[Invited Talk]
Analog in-memory computing in FeFET based 1T1R array for low-power edge AI applications Daisuke Saito, Toshiyuki Kobayashi, Hiroki Koga (SONY), Yusuke Shuto, Jun Okuno, Kenta Konishi (SSS), Masanori Tsukamoto, Kazunobu Ohkuri (SONY), Taku Umebayashi (SSS), Takayuki Ezaki (SONY) |
[more] |
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IEICE-ICD, IEICE-SDM, IST [detail] |
2020-08-06 09:30 |
Online |
Online |
[Invited Talk]
SoC compatible 1T1C FeRAM memory array based on ferroelectric Hf0.5Zr0.5O2
-- Report on 2020 IEEE VLSI Symposia -- Jun Okuno, Takafumi Kunihiro, Kenta Konishi, Fumitaka Sugaya, Yusuke Shuto, Hideki Maemura, Masanori Tsukamoto, Taku Umebayashi (SSS) |
[more] |
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IST |
2018-03-09 12:00 |
Tokyo |
NHK Housou-Gijyutu Lab. |
[Invited Talk]
Pixel/DRAM/logic 3-layer stacked CMOS image sensor technology Hidenobu Tsugawa, Hiroshi Takahashi, Ryoichi Nakamura, Taku Umebayashi, Tomoharu Ogita, Hitoshi Okano, Kazuya Iwase, Hiroyuki Kawashima, Takatsugu Yamasaki, Daisuke Yoneyama, Jun Hashizume, Tsutomu Nakajima, Kenichi Murata, Yoshikazu Kanaishi, Kenji Ikeda, Keiji Tatani, Hajime Nakayama, Tsutomu Haruta, Tetsuo Nomoto (Sony) |
[more] |
IST2018-17 pp.25-29 |
IST |
2017-03-10 13:20 |
Tokyo |
NHK Research Lab. Auditorium (Setagaya) |
A 1/2.3in 20Mpixel 3-Layer Stacked CMOS Image Sensor with DRAM Tsutomu Haruta, Tsutomu Nakajima, Jun Hashizume, Taku Umebayashi, Hiroshi Takahashi, Kazuo Taniguchi, Masami Kuroda, Hiroshi Sumihiro, Koji Enoki (Sony Semiconductor Solutions), Takatsugu Yamasaki (Sony Semiconductor Manufacturing), Katsuya Ikezawa, Atsushi Kitahara, Masao Zen, Masafumi Oyama, Hiroki Koga (Sony Semiconductor Solutions) |
[more] |
IST2017-13 pp.19-22 |
IST |
2014-03-14 11:30 |
Tokyo |
NHK |
3D Stacked CMOS Image Sensor Taku Umebayashi, Tomoharu Ogita, Shunichi Sukegawa, Tsutomu Nakajima, Hiroshi Kawanobe (Sony), Ken Koseki (Sony LSI Design), Tsutomu Haruta, Hiroshi Takahashi (Sony), Keishi Inoue (Sony Semiconductor), Toshifumi Wakano, Yusuke Mada, Koji Fukumoto, Takashi Nagano, Yoshikazu Nitta, Teruo Hirayama (Sony) |
We have developed 3D stacked CMOS image sensor. This technology is a Back-illuminated CIS stacking on a logic substrate.... [more] |
IST2014-9 p.5 |
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