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| Search Results: Conference Papers |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| IST, IEICE-ICD |
2015-07-02
15:50 |
Kanagawa |
National Defense Academy |
[Panel Discussion]
3D Imaging Technologies and Their Applications
-- Current Issues and Future Prospect --
Shoichi Masui (Fujitsu Labs.), Makoto Ikeda (Tokyo Univ.), Shoji Kawahito (Shizuoka Univ.), Hironobu Fujiyoshi (Chubu Univ.) |
[more] |
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| IST, IEICE-ICD |
2012-07-27
11:15 |
Yamagata |
Yamagata University (Yonezawa) |
Loop Design Optimization for Fourth-Order Fractional-N PLL Frequency Synthesizers
Shoichi Masui (Fujitsu Labs), Lee Jun-Gyu (Tohoku Univ.) |
[more] |
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| IST, IEICE-ICD |
2011-07-22
13:55 |
Hiroshima |
Hiroshima Institute of Technology |
Analog Design Optimization with gm/ID Lookup Table Design Methodology
Takayuki Konishi, Takaaki Nagashima, Ben Patrick (Tohoku Univ.), Takana Kaho (NTT), Shoichi Masui (Tohoku Univ.) |
[more] |
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| IST, IEICE-ICD |
2010-07-23
09:40 |
Osaka |
Josho Gakuen Osaka Center |
OTA Design Using gm/ID Lookup Table Methodology
-- Featuring Settling Time Optimization --
Toru Kashimura, Takayuki Konishi, Shoichi Masui (Tohoku Univ.) |
[more] |
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| IST, IEICE-ICD |
2010-07-23
16:35 |
Osaka |
Josho Gakuen Osaka Center |
Self-Dithered Digital Delta Sigma Modulators for Fractional-N Frequency Synthesizers
Zule Xu, Jun Gyu Lee, Shoichi Masui (Tohoku Univ.) |
[more] |
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