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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| IST |
2022-09-22
13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online) |
A 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Oxide Based Full Trench Isolation for Large Full Well Capacity and High Quantum Efficiency
Chihiro Tomita, Koichiro Zaitsu, Akira Matsumoto, Mizuki Nishida, Yusuke Tanaka, Hirofumi Yamashita, Yusuke Satake (SSS), Takashi Watanabe, Kunihiko Araki, Naoki Nei (SCK), Keiichi Nakazawa, Junpei Yamamoto, Mutsuo Uehara (SSS), Hiroyuki Kawashima, Yusaku Kobayashi (SCK), Tomoyuki Hirano, Keiji Tatani (SSS) |
[more] |
IST2022-34
pp.1-4 |
| IEICE-ICD, IEICE-SDM, IST [detail] |
2022-08-08
09:00 |
Online |
On-line |
[Invited Talk]
A 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Oxide Based Full Trench Isolation for Large Full Well Capacity and High Quantum Efficiency
Koichiro Zaitsu, Akira Matsumoto, Mizuki Nishida, Yusuke Tanaka, Hirofumi Yamashita, Yosuke Satake (Sony Semiconductor Solutions), Takashi Watanabe, Kunihiko Araki, Naoki Nei (Sony Semiconductor Manufacturing), Keiichi Nakazawa, Junpei Yamamoto, Mutsuo Uehara (Sony Semiconductor Solutions), Hiroyuki Kawashima, Yusaku Kobayashi (Sony Semiconductor Manufacturing), Tomoyuki Hirano, Keiji Tatani (Sony Semiconductor Solutions) |
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