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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 3 of 3  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IST 2019-03-22
09:00
Tokyo Kikai-Shinko-Kaikan Bldg. 0.68e rms RandomNoise 121dB DynamicRange Sub pixel architecture CMOS Image Sensor with LED Flicker Mitigation
Mizuno Hiroyuki, Satoko Iida, Yorito Sakano, Tomohiko Asatsuma (SSS), Masashi Takami (SCK), Ippei Yoshiba, Nobuyuki Ohba, Takumi Oka, Kazunori Yamaguchi, Atsushi Suzuki, Keita Suzuki, Manabu Yamada, Yasushi Tateshita, Keiichi Ohno (SSS)
This is a report of a CMOS image sensor with a sub-pixel architecture having a pixel pitch of 3 µm. The aforementioned s... [more] IST2019-12
pp.1-6
IST 2019-03-22
11:20
Tokyo Kikai-Shinko-Kaikan Bldg. Back-Illuminated 2.74 μm-Pixel-Pitch Global Shutter CMOS Image Sensor with Charge-Domain Memory Achieving a 10k e- Saturation Signal
Yoshimichi Kumagai, Ryoto Yoshita, Naoyuki Osawa, Harumi Ikeda, Kazuyoshi Yamashita, Takashi Abe, Shigetaka Kudoh (SSS), Junji Yamane, Tooru Idekoba, Shinichiro Nohdo, Yuma Ono, Sachihito Kunitake, Mitsuru Sato, Naoyuki Sato, Takayuki Enomoto (SCK), Keiichi Nakazawa, Hiroyuki Mori, Yasushi Tateshita, Keiichi Ohno (SSS)
 [more] IST2019-16
pp.21-25
IST 2014-03-14
12:00
Tokyo NHK Three-dimensional Structures for High Saturation Signals and Crosstalk Suppression in 1.20 um Pixel Back-Illuminated CMOS Image Sensor
Takekazu Shinohara, Kazufumi Watanabe (Sony Semiconductor), Takashi Abe, Kazunobu Ohta (Sony), Hajime Nakayama (Sony Semiconductor), Takafumi Morikawa, Keiichi Ohno (Sony), Dai Sugimoto (Sony Semiconductor), Shingo Kadomura, Teruo Hirayama (Sony)
We propose two technologies, vertical transfer gate (VTG) and buried shielding metal (BSM), that can be applied to 1.20 ... [more] IST2014-10
pp.7-10
 Results 1 - 3 of 3  /   
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